This invention relates to programmable logic devices, and more particularly to implementing memory structures within such devices.
Common architectural features of programmable logic devices include a two-dimensional array of rows and columns of logic array blocks (LABs) and a programmable network of interconnection conductors for conveying signals between the LABs. The design of programmable logic devices may be enhanced by the addition of large memory blocks (e.g., random access memory (RAM) or read-only memory (ROM)) between the LABs (see, for example, Cliff et al. U.S. Pat. No. 5,689,195, and Jefferson et al. U.S. patent application Ser. No. 09/266,235, filed Mar. 10, 1999).
These memory blocks are useful for storing large blocks of data and/or performing various logic functions that may be more efficiently performed in a single relatively large memory block rather than in several LABs. However, there are some applications in which using these memory blocks may not be an efficient use of system resources. When applications use only a fraction of the available capacity of these memory blocks, for example, the chip area and the interconnect resources allocated to these memory blocks are not being used efficiently.
The present invention relates to an improved LAB that allows a user to programmably selectively implement multifunction memory arrays on a programmable logic device. The improved LAB is programmably configurable for operation in at least two modes: in a first mode, the LAB is configured to perform logic functions; in a second mode, the LAB is usable as a multifunction memory array. In one embodiment, the multifunction memory array may be addressed on a LAB wide basis with separate read and write addresses such that it may be configured to implement a variety of memory schemes, including first-in-first-out (FIFO) memory and random access memory (RAM).
The improved LAB that is constructed in accordance with the principles of the present invention possesses several advantageous features over conventional LAB designs. For example, the improved LAB will allow a user to efficiently build modular memory structures in a programmable logic device by allowing the user to programmably configure, as necessary, only those LABs that need to be used as multifunction memory arrays.
Further features of the invention, its nature and various advantages will be more apparent from the accompanying drawings and the following detailed description of the invention.